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]cpu family : %dmodel : %dcpu MHz : %lfflags : %nAuthenticAMDGenuineIntelTHERMAL EVENTUndecoded extended event %xBANK %dnot finished?
CPU %u
BANK %d
TSC 0x%Lx
RIP 0x%02x:0x%Lx
MISC 0x%Lx
ADDR 0x%Lx
MCGSTATUS 0x%Lx
PROCESSOR %u:0x%x
TIME %Lu
mcelog: %i,%iUnknown Intel CPU
CPU %d %s TSC %Lx %s
RIP%s %02x:%Lx MISC %Lx ADDR %Lx STATUS %Lx MCGSTATUS %Lx
Unknown vendorMCE %d
consider an updateRIP: %s
(Fields were incomplete)
CPU %u BANK %u%nCPU %u %u%nMCGSTATUSMCGSTATUS %Lx%nRIPRIP !INEXACT!%02x:<%016Lx> {%100s}%nTSCTSC %Lx%nADDRADDR %Lx%nMISCMISC %Lx%nPROCESSORPROCESSOR %u:%x%nTIMETIME %Lu%nCannot open config file %s
0.9premcelog %s
Cannot open %sMCE_GET_RECORD_LENMCE_GET_LOG_LENdaemon/dev/mceloglogfilek8p4genericcore2intel-cpuignorenodevno-filterno-dmidmi-verbosecpumhzsyslog-errordump-raw-asciirawno-syslogversionsupportedp6olddunningtonxeon74xxxeon75xxcore_i7nehalemxeon71xxtulsageneric CPUIntel PPro/P2/P3/old XeonIntel CoreAMD K8 and derivatesIntel P4Intel Xeon 7400Intel Xeon 71xxCyrixUMCvendor 4Centaurvendor 6TransmetaNSCUsage:
  mcelog [options]  [mcelogdevice]
Decode machine check error records from kernel.
Normally this is invoked from a cronjob or using the kernel trigger.
  mcelog [options] --ascii < log
  mcelog [options] --ascii --file log
Decode machine check ASCII output from kernel logs
Options:
--cpu CPU           Set CPU type CPU to decode (see below for valid types)
--cpumhz MHZ        Set CPU Mhz to decode time (output unreliable, not needed on new kernels)
--raw		     (with --ascii) Dump in raw ASCII format for machine processing
--daemon            Run in background polling for events (needs newer kernel)
--file filename     With --ascii read machine check log from filename instead of stdin
--syslog            Log decoded machine checks in syslog (default stdout or syslog for daemon)
--syslog-error	     Log decoded machine checks in syslog with error level
--no-syslog         Never log anything to syslog
--logfile filename  Append log output to logfile instead of stdout
--dmi               Use SMBIOS information to decode DIMMs (needs root)
--no-dmi            Don't use SMBIOS information
--dmi-verbose       Dump SMBIOS information (for debugging)
--filter            Inhibit known bogus events (default on)
--no-filter         Don't inhibit known broken events
--config-file filename Read config information from config file instead of /etc/mcelog.conf
mcelog: warning: Cannot parse /proc/cpuinfo
mcelog: warning: Cannot open /proc/cpuinfo
Timeout waiting for exception on other CPUsCannot open log file %s. Exiting.Unknown CPU type `%s' specified
This CPU is unsupported.  If you require MCE decoding support please
upgrade to RHEL6.
HARDWARE ERROR. This is *NOT* a software problem!
Please contact your hardware vendor
Unknown CPU type vendor %u family %x model %xForced cputype %s does not match cpu type %s from mcelogCPUID Vendor %s Family %u Model %u
warning: %lu bytes ignored in each recordWARNING: with --dmi mcelog --ascii must run on the same machine with the
     same BIOS/memory configuration as where the machine check occurred.
CPU %u: Machine Check Exception: %16Lx Bank %d: %016Lx%nCannot open input file `%s': %s
warning: record length longer than expected. Consider update.Intel Xeon 75xx / Core i7 ("Nehalem")/etc/mcelog.confUNKNOWNMCG status:RIPV EIPV MCIP MCi status:
Machine check not valid
Error overflow
Uncorrected error
Error enabled
MCi_MISC register valid
MCi_ADDR register valid
Processor context corrupt
MCA: %s TLB %s Error
%s CACHE %s %s Error
Internal Timer error
BUS %s %s %s %s %s Error
Unknown Error %x
Model:greenres3No ErrorUnclassifiedMicrocode ROM parity errorExternal errorFRC errorInstructionDataGenericUnknownRequest-timeoutRequest-no-timeoutMemory-accessReservedIOOther-transactionData-ReadData-WriteInstruction-FetchPrefetchEvictionSnoopLocal-CPU-originated-requestResponed-to-requestObserved-error-as-third-partyLevel-0Level-1Level-2Level-3FSB address parityResponse hard failResponse parityPIC and FSB data parityPad state machinePad strobe glitchPad address glitchProcessor %d heated above trip temperature. Throttling enabled.
Please check your system cooling. Performance will be impacted
Processor %d below trip temperature. Throttling disabled
Threshold based error status: %s
CPU %d has large number of corrected errors. Consider replacementcorrected filtering (some unreported errors in same region)
%s Generic memory hierarchy error
Internal unclassified error: %x
yellow
Large number of corrected errors. System operating, but you should
schedule it for service within a few weeksInvalid PIC request(Signature=0xF04H)unknown%d %s       bit%d = %s
  Northbridge %s
  ECC syndrome = %x
  Chipkill ECC syndrome = %x
  link number = %x
  L2 cache ECC error
Bus or cacheCache tag  %s array error
physicalvirtual found by scrubberdata cacheinstruction cachebus unitload/store unitnorthbridgefixed-issue reoderUnknow threshold counterMC4_MISC0 DRAM thresholdMC4_MISC1 Link thresholdMC4_MISC2 L3 Cache thresholdMC4_MISC3 FBDIMM thresholdUnknown threshold countererr cpu0err cpu1err cpu2err cpu3error found by scrubsublink or DRAM channelL3 subcache in error bit 0L3 subcache in error bit 1res12uncorrected ecc errorres23res24processor context corrupterror address validmisc error validerror enableerror uncorrectedinstructiondatareservedgeneric errorgeneric readgeneric writedata readdata writeinstruction fetchprefetchevictsnoop?res.i/orequest didn't time outrequest timed outlocal node originlocal node responselocal node observedgeneric participationRAM ECC errorCRC errorSync errorMaster abortTarget abortGART errorRMW errorWatchdog errorRAM Chipkill ECC errorDEV ErrorLink Data ErrorLink Protocol ErrorNB Array ErrorDRAM Parity ErrorLink RetryTablew Walk Data ErrorL3 Cache Data ErrorL3 Cache Tag ErrorL3 Cache LRU Error  Threshold error count overflow
  no decoder for unknown bank %u
  TLB error '%s transaction, level %s'
  memory/cache error '%s mem transaction, %s transaction, level %s'
  bus error '%s, %s
             %s mem transaction
             %s access, level %s'
  Instruction cache ECC error
  TLB parity error in %s array
  Data cache ECC error (syndrome %x)error overflow (multiple errors)d,,,,D,Dstring %s
hnd %x size %d expected %d
entry %x disabled
<%u>%hu Mhz NoneDevice Locator: %s
Bank Locator: %s
Manufacturer: %s
Serial Number: %s
Asset Tag: %s
Part Number: %s
/dev/memCannot mmap 0xf0000: %s_SM_Cannot find SMBIOS DMI tablesRANGESDMI_DIMMSOtherEDRAMVRAMSRAMFLASHEEPROMFEPROMCDRAM3DRAMSDRAMSGRAMRDRAMDDR2SIMMSIPChipDIPZIPProprietary CardTSOPRow of chipsSODIMMSRIMMFast-pagedStatic ColumnPseudo staticRAMBUSSynchronousCMOSEDOWindow DRAMCache DRAMNon-volatileRes13Res14Res15Not enough unique address ranges. SMBIOS DIMM sanity check failedMissing locator. SMBIOS DIMM sanity check failedAmbigious locators `%s'<->`%s'. SMBIOS DIMM sanity check failed
entry %lx length %d handle %x
handle %x length %d truncated
Memory device for address %lx too short %hu expected %lu
Width %hu Data Width %hu Size %u %s
WARNING: SMBIOS data is often unreliable. Take with a grain of salt!
No DIMM found for %lx in SMBIOS
Cannot open /dev/mem for DMI decoding: %sDMI tables at %x, %u bytes, %u entries
Cannot mmap SMBIOS tables at %xrange %x-%x h %x a %x row %u ilpos %u ildepth %u
dimm h %x width %u datawidth %u size %u set %u
.AC@@[at %.0f Mhz %u days %u:%u:%u uptime (unreliable)]/sys/devices/system/cpu/cpu%d/cpuidle/proc/acpi/processor/CPU%d/power/sys/devices/system/cpu/cpu%d/cpufreq/cpuinfo_max_freqnonstop_tscconstant_tsc C%d:usageusage[%d]/sys/devices%Lxinternal BINITfailure that caused IERRuncorrectable ECC errorBERR on this CPUMCE drivenMCE is observedBINIT observedPIC or FSB data parity errorBQ_DCU_READ_TYPEBQ_IFU_DEMAND_TYPEBQ_IFU_DEMAND_NC_TYPEBQ_DCU_RFO_TYPEBQ_DCU_RFO_LOCK_TYPEBQ_DCU_ITOM_TYPEBQ_DCU_WB_TYPEBC_DCU_WCEVICT_TYPEBQ_DCU_WCLINE_TYPEBQ_DCU_BTM_TYPEBQ_DCU_INTACK_TYPEBQ_DCU_INVALL2_TYPEBQ_DCU_FLUSHL2_TYPEBQ_DCU_PART_RD_TYPEBQ_DCU_PART_WR_TYPEBQ_DCU_SPEC_CYC_TYPEBQ_DCU_IO_RD_TYPEBQ_DCU_IO_WR_TYPEBQ_DCU_LOCK_RD_TYPEBQ_DCU_LOCK_WR_TYPEBQ_DCU_SPLOCK_RD_TYPEBQ_ERR_HARD_TYPEBQ_ERR_DOUBLE_TYPEBQ_ERR_AERR2_TYPEBQ_ERR_SINGLE_TYPEBQ_ERR_AERR1_TYPEreceived parity error on response transactiontimeout BINIT (ROB timeout). No micro-instruction retired for some timebus transaction received hard error responsetwo failing bus transactions with address parity error (AERR)BINIT received from external busReceived hard error reponse on split transaction (Bus BINIT)FSB address parity error detected%Lu%%s: %s
<%u:%Lx>%s%sUnknown Intel CPU type family %x model %x
%uTransaction: %s
QPI Request Transaction IDQPI miscreserved 19-23Memory MISC reserved 25..37Memory MISC reserved 53..56Memory DIMM ID of errorMemory channel ID of errorMemory ECC syndromeQPI header had bad parityQPI reserved 20QPI reserved 21QPI misc reserved 14QPI misc reserved 15Memory read ECC errorMemory write parity errorMemory reserved 20Memory access out of rangeMemory internal RTID invalidMemory address parity errorGENRDWRACRES5RES6RES7Generic undefined requestMemory read errorMemory write errorAddress/Command errorMemory scrubbing errorReserved 5Reserved 6Reserved 7Received an invalid CMPDInvalid S-state transitionMEMORY CONTROLLER %s_CHANNEL%s_ERR
QPI class and opcode of packet with errorQPI Requestor/Home Node ID (RHNID)Internal machine check status reserved 16..23Internal machine check status reserved 32..56Memory corrected error count (CORE_ERR_CNT)Memory transaction Tracker ID (RTId)QPI Data packet had bad parityNumber of QPI retries exceededReceived QPI data packet that was poisoned by senderQPI received unsupported message encodingQPI credit type is not supportedSender sent too many QPI flits to the receiverQPI Sender sent a failed response to receiverClock jitter detected in internal QPI clockingQPI Interleave/Head Indication Bit (IIB)Memory ECC error occurred during scrubMemory error in half of redundant memoryMemory byte enable parity errorReset firmware did not completeInvalid Power Management RequestVID controller does not match POC controller selectedMSID from POC does not match CPU MSIDCorrectable ECC event on outgoing core 0 dataCorrectable ECC event on outgoing core 1 dataCorrectable ECC event on outgoing core 3 dataUncorrectable ECC event on outgoing core 0 dataUncorrectable ECC event on outgoing core 1 dataUncorrectable ECC event on outgoing core 3 dataParity error detected during FSB request phaseHard Failure response received for a local transactionParity error on FSB response field detectedParity data error on inbound data detectedIntel Cache Safe Technology Queue full error
or disabled ways in a set overflowQuiet cycle timeout error (correctable)Write Exclusive error from core 0Write Exclusive error from core 1Write exclusive error from core 2Internal timeout errorInclusion error from core 0Inclusion error from core 1Inclusion error from FSBSNP stall error from FSBWrite stall error from FSBFSB Arbiter Timeout errorInclusion error from core 2MISC format %Lx value %Lx
Corrected eventsglobal----config-filechoicenumericalconfig file line %d: %s
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Anon7 - 2021