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HU@t$ f= tNf= tH1 LHU@t$ f=t&f=t D$ < D$ vH=LP 1S81t$ 1H=nP S8 H$ H$ L$ L$ L$ H f D H } ~ } Hf H| x| H N | | HSHt[ÐL[(H=O [A1 IA`O
W D G к At At%At,DLc ADf AD AD @ SHt8 Ɖ t[1HH5p [{H=N S8[1f D IG Q<wMDG AA A G
t=tDt1 LS 1AA D 1 fAffAAAf. SHt61 u!uHH5p [}H=M S8[1 Hl$Ld$1Ll$Lt$HH\$H( AIA_ E ˺ D E
AtIA A 1 DLDHH $Hl$Ld$Ll$Lt$ H( Af1 H $Hl$Ld$Ll$Lt$ H( D H H=M R(>AA 1 IA`O
W D G к At At%At,DL# DffA DA DA ÐAV@IAUMATIUSt%~! AЅ I tJ~E LLAՅ I~# LLAՅt\I݃~ LLAՅt4I t#LL A[]A\A]A^1[]A\A]A^ @ H H@HL@@f D f D H H@HL@Hf D f D Ld$Ll$IH\$Hl$ALt$L|$H8@ L t Ah A A D A At:A$ IDŽ$ 0 u]LetI$ f D AtDLA AH\$Hl$DLd$Ll$ Lt$(L|$0H8fu8 @ I|$ 1 HA$ A 81 @ HcÉIl D94 L蛯ōEw@uˉuAF9 AL$ AT$
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L衯AfAD$g< LӬAD$ LA 豬A$ A L4 褮H HcH ID AW1AVIH=`I AUATUSHHt$AV8HcHD$8 t M^0H[]A\A]A^A_H=II 1A L衬X
ID$ D$E1AD$ AD$ AD$ AD$ tE < 1LӭōEw˾ L蜫LAŁ A|$ DDAHAD$
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AD$ C AD$ C FA N|.Af D "L Ht$L K S
H=UH sDC E1AV8D$|$ HL[]A\A]A^A_Ld$H\$H( 1I HdH%( H$ 1 1HL
H$ dH3%( uH$ L$ H( U Ld$Ll$L%/c Lt$L|$IH\$Hl$H8AIHc I)IMt 1HÐHLLDHI9uH\$Hl$Ld$Ll$ Lt$(L|$0H8ÐUHS pa HHb Ht D HHHuH[ÐH H Internal bug: Accessing non-read configuration byte at position %x !!! Invalid class %04x for header type %02x
!!! Unknown header type %02x
Control: I/O%c Mem%c BusMaster%c SpecCycle%c MemWINV%c VGASnoop%c ParErr%c Stepping%c SERR%c FastB2B%c DisINTx%c
Status: Cap%c 66MHz%c UDF%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c <TAbort%c <MAbort%c >SERR%c <PERR%c INTx%c
Interrupt: pin %c routed to IRQ %d
Bus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d
!!! Unknown I/O range types %x/%x
I/O behind bridge: %08x-%08x
!!! Unknown memory range types %x/%x
Memory behind bridge: %08x-%08x
!!! Unknown prefetchable memory range types %x/%x
Prefetchable memory behind bridge: %08x-%08x
Prefetchable memory behind bridge: %08x%08x-%08x%08x
Secondary status: 66MHz%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c <TAbort%c <MAbort%c <SERR%c <PERR%c
BridgeCtl: Parity%c SERR%c NoISA%c VGA%c MAbort%c >Reset%c FastB2B%c
PriDiscTmr%c SecDiscTmr%c DiscTmrStat%c DiscTmrSERREn%c
Memory window %d: %08x-%08x%s%s
BridgeCtl: Parity%c SERR%c ISA%c VGA%c MAbort%c >Reset%c 16bInt%c PostWrite%c
16-bit legacy interface ports at %04x
lspci: Unable to read the standard configuration space header of device %04x:%02x:%02x.%d
[size=%u%s] %04x: %02x:%02x.%d " [virtual] Expansion ROM at <ignored> <unassigned> [disabled] [disabled by cmd] %08lx Region %d: I/O ports at %04lx <invalid-64bit-slot> non- 32-bit 64-bit low-1M type 3 (%s, %sprefetchable) (rev %02x) (prog-if %02x Subsystem: %s
%02x: Slot: Device: Class: %s
SVendor: %s
SDevice: %s
PhySlot: %s
Rev: %02x
ProgIf: %02x
-r%02x -p%02x "" "" Physical Slot: %s
slow medium fast ?? Latency: %d ( %dns min %dns max , Cache Line Size: %d bytes Flags: bus master, VGA palette snoop, stepping, fast Back2Back, 66MHz, user-definable features, %s devsel , latency %d , IRQ %d BIST is running BIST result: %02x
(prefetchable) I/O window %d: %08x-%08x%s
Secondary status: SERR <access denied to the rest> --version lspci version 3.1.7 -s: %s -d: %s ~+0+0+0+0+0+0+0+0+,0+0+0+,0+0+0+0+0+0+0+0+0+0+0+0+0+0+0+0+ ,0+.,0+0+0+0+`,0+z,0+++0+++0+++0+,0+,lspci K M G T \\ \x%02x Vital Product Data End Product Name: Read-only Read/write %s fields:
[%c%c] %s: bad good %d byte(s) free
large small Not readable No end tag found Extended capability Engineering changes Manufacture ID Part number Reserved Read-write area Serial number Asset tag Vendor specific System specific Unknown checksum %s, %d byte(s) reserved
Unknown %s resource type %02x, will not decode more.
unknown 2.5GT/s -3.5dB -6dB Revision ID: %u.%02u
Link Frequency 0: %s
Link Frequency 1: %s
Bus Number: %02x
Link Frequency: %s
HyperTransport: Switch HyperTransport: DirectRoute HyperTransport: VCSet HyperTransport: Retry Mode HyperTransport: #%02x
x%d Express (v%d) Legacy Endpoint Root Port (Slot%c) Upstream Port Downstream Port (Slot%c) PCI/PCI-X Bridge Root Complex Event Collector Unknown type %d , MSI %02x
ExtTag%c AttnBtn%c AttnInd%c PwrInd%c RBE%c FLReset%c SlotPowerLimit %.3fW BrConfRtry%c L0s L1 L0s LnkCtl: ASPM %s; RCB %d bytes RootCap: CRSVisible%c
Range ABCD Not Supported Range A Range B Range AB Range BC Range ABC Range BCD ARIFwd%c
17s to 64s 50us to 50ms 50us to 100us 1ms to 10ms 16ms to 55ms 65ms to 210ms 260ms to 900ms 1s to 3.5s 4s to 13s Normal Operating Range Capabilities: <access denied> [%02x] <chain looped> <chain broken> Power Management version %d
Bridge: PM%c B3%c
AGP version %x.%x
Address: %08x %08x Data: %04x
CompactPCI hot-swap <?> PCI-X non-bridge device bridge simple PCI-X bridge device Hot-plug capable AGP3 <?> Secure device <?> PBA: BAR=%d offset=%08x
SATA HBA v%d.%d BAR%d Offset=%08x
InCfgSpace BAR??%d
PCI Advanced Features AFCap: TP%c FLR%c
AFCtrl: FLR%c
AFStatus: TP%c
#%02x [%04x]
conv 66MHz 100MHz 133MHz ?4 ?5 ?6 ?7 8bit 16bit [2] 32bit 4bit [6] N/C 200MHz 300MHz 400MHz 500MHz 600MHz 800MHz 1.0GHz 1.2GHz 1.4GHz 1.6GHz [a] [b] [c] [d] [e] Vend <1us <2us <4us <8us <16us <32us <64us unlimited <64ns <128ns <256ns <512ns Disabled L0s Enabled L0s L1 Enabled On Blink Off HyperTransport: Slave or Primary Interface !!! Possibly incomplete decoding Command: BaseUnitID=%u UnitCnt=%u MastHost%c DefDir%c
Command: BaseUnitID=%u UnitCnt=%u MastHost%c DefDir%c DUL%c
Link Control 0: CFlE%c CST%c CFE%c <LkFail%c Init%c EOC%c TXO%c <CRCErr=%x
Link Control 0: CFlE%c CST%c CFE%c <LkFail%c Init%c EOC%c TXO%c <CRCErr=%x IsocEn%c LSEn%c ExtCTL%c 64b%c
Link Config 0: MLWI=%s MLWO=%s LWI=%s LWO=%s
Link Config 0: MLWI=%1$s DwFcIn%5$c MLWO=%2$s DwFcOut%6$c LWI=%3$s DwFcInEn%7$c LWO=%4$s DwFcOutEn%8$c
Link Control 1: CFlE%c CST%c CFE%c <LkFail%c Init%c EOC%c TXO%c <CRCErr=%x
Link Control 1: CFlE%c CST%c CFE%c <LkFail%c Init%c EOC%c TXO%c <CRCErr=%x IsocEn%c LSEn%c ExtCTL%c 64b%c
Link Config 1: MLWI=%s MLWO=%s LWI=%s LWO=%s
Link Config 1: MLWI=%1$s DwFcIn%5$c MLWO=%2$s DwFcOut%6$c LWI=%3$s DwFcInEn%7$c LWO=%4$s DwFcOutEn%8$c
Link Error 0: <Prot%c <Ovfl%c <EOC%c CTLTm%c
Link Frequency Capability 0: 200MHz%c 300MHz%c 400MHz%c 500MHz%c 600MHz%c 800MHz%c 1.0GHz%c 1.2GHz%c 1.4GHz%c 1.6GHz%c Vend%c
Feature Capability: IsocFC%c LDTSTOP%c CRCTM%c ECTLT%c 64bA%c UIDRD%c
Link Error 1: <Prot%c <Ovfl%c <EOC%c CTLTm%c
Link Frequency Capability 1: 200MHz%c 300MHz%c 400MHz%c 500MHz%c 600MHz%c 800MHz%c 1.0GHz%c 1.2GHz%c 1.4GHz%c 1.6GHz%c Vend%c
Error Handling: PFlE%c OFlE%c PFE%c OFE%c EOCFE%c RFE%c CRCFE%c SERRFE%c CF%c RE%c PNFE%c ONFE%c EOCNFE%c RNFE%c CRCNFE%c SERRNFE%c
Prefetchable memory behind bridge Upper: %02x-%02x
HyperTransport: Host or Secondary Interface Command: WarmRst%c DblEnd%c
Command: WarmRst%c DblEnd%c DevNum=%u ChainSide%c HostHide%c Slave%c <EOCErr%c DUL%c
Link Control: CFlE%c CST%c CFE%c <LkFail%c Init%c EOC%c TXO%c <CRCErr=%x
Link Control: CFlE%c CST%c CFE%c <LkFail%c Init%c EOC%c TXO%c <CRCErr=%x IsocEn%c LSEn%c ExtCTL%c 64b%c
Link Config: MLWI=%s MLWO=%s LWI=%s LWO=%s
Link Config: MLWI=%1$s DwFcIn%5$c MLWO=%2$s DwFcOut%6$c LWI=%3$s DwFcInEn%7$c LWO=%4$s DwFcOutEn%8$c
Link Error: <Prot%c <Ovfl%c <EOC%c CTLTm%c
Link Frequency Capability: 200MHz%c 300MHz%c 400MHz%c 500MHz%c 600MHz%c 800MHz%c 1.0GHz%c 1.2GHz%c 1.4GHz%c 1.6GHz%c Vend%c
Feature Capability: IsocFC%c LDTSTOP%c CRCTM%c ECTLT%c 64bA%c UIDRD%c ExtRS%c UCnfE%c
HyperTransport: Interrupt Discovery and Configuration HyperTransport: Revision ID: %u.%02u
HyperTransport: UnitID Clumping HyperTransport: Extended Configuration Space Access HyperTransport: Address Mapping HyperTransport: MSI Mapping Enable%c Fixed%c
Mapping Address Base: %016llx
HyperTransport: X86 (reserved) PCI/PCI-X to PCI-Express Bridge Root Complex Integrated Endpoint DevCap: MaxPayload %d bytes, PhantFunc %d, Latency L0s %s, L1 %s
DevCtl: Report errors: Correctable%c Non-Fatal%c Fatal%c Unsupported%c
RlxdOrd%c ExtTag%c PhantFunc%c AuxPwr%c NoSnoop%c
MaxPayload %d bytes, MaxReadReq %d bytes
DevSta: CorrErr%c UncorrErr%c FatalErr%c UnsuppReq%c AuxPwr%c TransPend%c
LnkCap: Port #%d, Speed %s, Width x%d, ASPM %s, Latency L0 %s, L1 %s
ClockPM%c Surprise%c LLActRep%c BwNot%c
Disabled%c Retrain%c CommClk%c
ExtSynch%c ClockPM%c AutWidDis%c BWInt%c AutBWInt%c
LnkSta: Speed %s, Width x%d, TrErr%c Train%c SlotClk%c DLActive%c BWMgmt%c ABWMgmt%c
SltCap: AttnBtn%c PwrCtrl%c MRL%c AttnInd%c PwrInd%c HotPlug%c Surprise%c
Slot #%d, PowerLimit %.3fW; Interlock%c NoCompl%c
SltCtl: Enable: AttnBtn%c PwrFlt%c MRL%c PresDet%c CmdCplt%c HPIrq%c LinkChg%c
Control: AttnInd %s, PwrInd %s, Power%c Interlock%c
SltSta: Status: AttnBtn%c PowerFlt%c MRL%c CmdCplt%c PresDet%c Interlock%c
Changed: MRL%c PresDet%c LinkState%c
RootCtl: ErrCorrectable%c ErrNon-Fatal%c ErrFatal%c PMEIntEna%c CRSVisible%c
RootSta: PME ReqID %04x, PMEStatus%c PMEPending%c
DevCap2: Completion Timeout: %s, TimeoutDis%c DevCtl2: Completion Timeout: %s, TimeoutDis%c 200-400mV(full-swing)/100-200mV(half-swing) 800-1200mV(full-swing)/400-700mV(half-swing) LnkCtl2: Target Link Speed: %s, EnterCompliance%c SpeedDis%c, Selectable De-emphasis: %s
Transmit Margin: %s, EnterModifiedCompliance%c ComplianceSOS%c
Compliance De-emphasis: %s
LnkSta2: Current De-emphasis Level: %s
Flags: PMEClk%c DSI%c D1%c D2%c AuxCurrent=%dmA PME(D0%c,D1%c,D2%c,D3hot%c,D3cold%c)
Status: D%d NoSoftRst%c PME-Enable%c DSel=%d DScale=%d PME%c
Status: RQ=%d Iso%c ArqSz=%d Cal=%d SBA%c ITACoh%c GART64%c HTrans%c 64bit%c FW%c AGP3%c Rate=%s
Command: RQ=%d ArqSz=%d Cal=%d SBA%c AGP%c GART64%c 64bit%c FW%c Rate=%s
Slot ID: %d slots, First%c, chassis %02x
MSI: Enable%c Count=%d/%d Maskable%c 64bit%c
Masking: %08x Pending: %08x
Command: DPERE%c ERO%c RBC=%d OST=%d
Status: Dev=%02x:%02x.%d 64bit%c 133MHz%c SCD%c USC%c DC=%s DMMRBC=%u DMOST=%u DMCRS=%u RSCEM%c 266MHz%c 533MHz%c
Secondary Status: 64bit%c 133MHz%c SCD%c USC%c SCO%c SRD%c Freq=%s
Status: Dev=%02x:%02x.%d 64bit%c 133MHz%c SCD%c USC%c SCO%c SRD%c
Upstream: Capacity=%u CommitmentLimit=%u
Downstream: Capacity=%u CommitmentLimit=%u
Vendor Specific Information: Len=%02x <?>
Debug port: BAR=%d offset=%04x
CompactPCI central resource control <?> MSI-X: Enable%c Count=%d Masked%c
Vector table: BAR=%d offset=%08x
v4V4++&44333u3U3y;;;;j4j4;;j4j4j4j4j4j4;;;;;44;;44;;44;;(=r=m?AABCCEEEF F1FFFFFG H 7 d @ w ?=
#<o:Single Root I/O Virtualization (SR-IOV) IOVCap: Migration%c, Interrupt Message Number: %03x
IOVCtl: Enable%c Migration%c Interrupt%c MSE%c ARIHierarchy%c
Function Dependency Link: %02x
%08x (%s-bit, %sprefetchable)
VF Migration: offset: %08x, BIR: %x
UESta: DLP%c SDES%c TLP%c FCP%c CmpltTO%c CmpltAbrt%c UnxCmplt%c RxOF%c MalfTLP%c ECRC%c UnsupReq%c ACSViol%c
UEMsk: DLP%c SDES%c TLP%c FCP%c CmpltTO%c CmpltAbrt%c UnxCmplt%c RxOF%c MalfTLP%c ECRC%c UnsupReq%c ACSViol%c
UESvrt: DLP%c SDES%c TLP%c FCP%c CmpltTO%c CmpltAbrt%c UnxCmplt%c RxOF%c MalfTLP%c ECRC%c UnsupReq%c ACSViol%c
CESta: RxErr%c BadTLP%c BadDLLP%c Rollover%c Timeout%c NonFatalErr%c
CEMsk: RxErr%c BadTLP%c BadDLLP%c Rollover%c Timeout%c NonFatalErr%c
AERCap: First Error Pointer: %02x, GenCap%c CGenEn%c ChkCap%c ChkEn%c
Caps: LPEVC=%d RefClk=%s PATEntryBits=%d
Port Arbitration Table [%x] <?>
Caps: PATOffset=%02x MaxTimeSlots=%d RejSnoopTrans%c
Ctrl: Enable%c ID=%d ArbSelect=%s TC/VC=%02x
Status: NegoPending%c InProgress%c
Device Serial Number %02x-%02x-%02x-%02x-%02x-%02x-%02x-%02x
Desc: PortNumber=%02x ComponentID=%02x EltType=%s
Desc: TargetPort=%02x TargetComponent=%02x AssocRCRB%c LinkType=%s LinkValid%c
Addr: %02x:%02x.%d CfgSpace=%08x%08x
Root Complex Internal Link <?> Root Complex Event Collector <?> Multi-Function Virtual Channel <?> ACSCap: SrcValid%c TransBlk%c ReqRedir%c CmpltRedir%c UpstreamFwd%c EgressCtrl%c DirectTrans%c
ACSCtl: SrcValid%c TransBlk%c ReqRedir%c CmpltRedir%c UpstreamFwd%c EgressCtrl%c DirectTrans%c
Alternative Routing-ID Interpretation (ARI) ARICap: MFVC%c ACS%c, Next Function: %d
ARICtl: MFVC%c ACS%c, Function Group: %d
Address Translation Service (ATS) ATSCap: Invalidate Queue Depth: %02x
ATSCtl: Enable%c, Smallest Translation Unit: %02x
Interrupt vector mode supported Device specific mode supported Steering table in TPH capability structure Steering table in MSI-X table Reserved steering table location Max no snoop latency: %lldns
IOVSta: Migration%c
Initial VFs: %d, Total VFs: %d, Number of VFs: %d, VF offset: %d, stride: %d, Device ID: %04x
Supported Page Size: %08x, System Page Size: %08x
Region %d: Memory at 32 64 Capabilities: [%03x v%d Advanced Error Reporting Virtual Channel ??%d %c%s%c
Ctrl: ArbSelect=%s
Status: InProgress%c
VC%d: <unreadable> Arb: Port Arbitration Table <?> Power Budgeting <?> Root Complex Link Link%d: MemMapped Config Addr: %08x%08x
Root Bridge Control Block <?> Vendor Specific Information: ID=%04x Rev=%d Len=%03x <?>
Access Control Services Transaction Processing Hints Extended requester support No steering table available Latency Tolerance Reporting Max snoop latency: %lldns
DEQ QPNNQQQNqNDL4LKKDDDDDDKgJ Fixed WRR32 WRR64 WRR128 TWRR128 WRR256 ??6 ??7 Fixed WRR32 WRR64 WRR128 ??4 ??5 ??6 ??7 100ns Config Egress Internal sysfs.path <name-too-long> uname() failed: %m %i%i%i%i%i%i Driver: %s
Module: %s
Kernel driver in use: %s
, Kernel modules: %s %s %s/devices/%04x:%02x:%02x.%d/driver show_driver: sysfs device name too long, why? Cannot open pcimap file %s: %m /lib/modules/%s/modules.pcimap Unterminated or too long line in %s %02x.%x -[%02x]- -[%02x-%02x]- %s +-[%04x:%02x]- \-[%04x:%02x]- ## %02x.%02x:%d is a bridge from %02x to %02x-%02x
!!! Bridge points to invalid primary bus. !!! Bridge points to invalid bus range. Discovered device %02x:%02x.%d
WARNING: Bus mapping can be reliable only with direct hardware access enabled.
Mapping bus %02x
But it was filtered out.
Summary of buses:
%02x: Entered via %02x:%02x.%d
Primary host bus Secondary host bus (?) %02x.%d Bridge to %02x-%02x <overlap bug> <crossing bug> dump.name help Known PCI access methods:
Known PCI access parameters:
%-20s %s (%s)
Unknown hardware configuration type %s No such PCI access method: %s (see `-A help' for a list) Invalid PCI access parameter syntax: %s Unrecognized PCI access parameter: %s (see `-O help' for a list) Unable to allocate %d bytes of memory {eheheheheOfAf fheheheheheheeTrying method %d... ...OK
...No.
Decided to use %s
pcilib: /usr/share/hwdata/pci.ids pci.id.ucw.cz net.domain Name of the ID cache file ~/.pciids-cache net.cache_name This access method is not supported. Cannot find any working access method. Out of memory (allocation of %d bytes failed) DNS domain used for resolving of ID's Unaligned write: pos=%02x,len=%d Unaligned read: pos=%02x, len=%d Writing to dump files is not supported. Name of the bus dump file to read from dump: line too long or unterminated dump: At most 4096 bytes of config space are supported Reading of register dumps (set the `dump.name' parameter) dump: File name not given. dump: Cannot open %s: %s ####:##:##.# %x:%x:%x.%d ###: %x: dump: Malformed line dump %s %s [%s] %s Device [%s] %s Device %s Vendor Device %04x:%04x Unknown vendor Class PriO PriP SecO SecP Master %s%s%s%s%s ProgIf <pci_lookup_name: buffer too small> <pci_lookup_name: invalid request> z4k~}zzzzc}|{zzzz {* Invalid domain number Invalid bus number Invalid slot number Invalid function number ':' expected Invalid vendor ID Invalid device ID Line too long Vendor does not exist Duplicate entry .d/ I/O error %s at %s, line %d
͍͍͍ Parse error %04x.%04x.%04x.%04x %04x.%04x.s %02x.%02x.%02x.c %s.%s Resolving %s
failed, h_errno=%d
"%s"
Unexpected RR in answer: class %d, type %d
Malformed DNS packet received
,œ)C~/ Using cache %s
rb Cache file does not exist
%d%x%x%x%x%n Error while reading %s %s.tmp-%s-%d wb Cannot write to %s: %s Writing cache to %s
%d %x %x %x %x %s
Error writing %s Cannot rename %s to %s: %s Not loading cache, will refresh everything
Unrecognized cache version %s, ignoring
Malformed cache file %s (line %d), ignoring #PCI-CACHE-1.0 %04x:%02x:%02x.%d: Found capability %04x of type %d at %04x
File name too long vpd config Cannot open %s sysfs_write: write failed: %s %s/slots Directory name too long %s/%s/%s address %x:%x:%x Error reading %s: %s Value in %s too long Path to the sysfs device tree /sys/bus/pci sysfs_read: read failed: %s %s/devices resource %llx %llx %llx Syntax error in %s irq class ...cannot open %s ...using %s linux-sysfs The sys filesystem on Linux %s/devices/%04x:%02x:%02x.%d/%s sysfs_read_vpd: read failed: %s sysfs_write: tried to write %d bytes at %d, but only %d succeeded sysfs_fill_slots: Couldn't parse entry address %s sysfs_scan: Couldn't parse entry name %s proc.path %s/%02x/%02x.%d %s/%04x:%02x/%02x.%d proc_write: write failed: %s proc_read: read failed: %s Path to the procfs bus tree /proc/bus/pci linux-proc The proc file system on Linux proc_write: tried to write %d bytes at %d, but only %d succeeded %x %x %x %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx proc: parse error (read only %d items) ...sanity check ...insane ...no I/O permission intel-conf1 intel-conf2 ...outside the Asylum at 0/%02x/0 No permission to access I/O ports (you probably have to be root). conf2_write: only first 16 devices exist. Raw I/O port access using Intel conf1 interface Raw I/O port access using Intel conf2 interface %04x:%02x:%02x.%d: Invalid 64-bit address seen for BAR %d. Scanning bus %02x for devices...
Bus %02x seen twice (firmware bug). Ignored. Device %04x:%02x:%02x.%d has unknown header type %02x.
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2 2 w2 2 2 0a 2 2 p2 r 2 P2 X2 j 2 P}2 P2 2 2 Usage: lspci [<switches>]
Basic display modes:
-mm Produce machine-readable output (single -m for an obsolete format)
-t Show bus tree
Display options:
-v Be verbose (-vv for very verbose)
-k Show kernel drivers handling each device
-x Show hex-dump of the standard part of the config space
-xxx Show hex-dump of the whole config space (dangerous; root only)
-xxxx Show hex-dump of the 4096-byte extended config space (root only)
-b Bus-centric view (addresses and IRQ's as seen by the bus)
-D Always show domain numbers
Resolving of device ID's to names:
-n Show numeric ID's
-nn Show both textual and numeric ID's (names & numbers)
-q Query the PCI ID database for unknown ID's via DNS
-qq As above, but re-query locally cached entries
-Q Query the PCI ID database for all ID's via DNS
Selection of devices:
-s [[[[<domain>]:]<bus>]:][<slot>][.[<func>]] Show only devices in selected slots
-d [<vendor>]:[<device>] Show only devices with specified ID's
Other options:
-i <file> Use specified ID database instead of %s
-p <file> Look up kernel modules in a given file instead of default modules.pcimap
-M Enable `bus mapping' mode (dangerous; root only)
PCI access options:
-A <method> Use the specified PCI access method (see `-A help' for a list)
-O <par>=<val> Set PCI access parameter (see `-O help' for a list)
-G Enable PCI access debugging
-H <mode> Use direct hardware access (<mode> = 1 or 2)
-F <file> Read PCI configuration dump from a given file
This version is modified by Red Hat, so that it also takes all
/usr/share/hwdata/pci.ids.d/*.ids files into account.
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